Above Board - Archive I
This is a series of articles that were published in The Omni Review that looks at some of the aspects involved with circuit board design. These articles were written by Nandor Kerek of System 80 Instruments in Surrey, B.C. Canada. Nandor can be reached at nkerek@intergate.bc.ca.
Contents
SMT Advantages & DisadvantagesDesigning for Manufacture
More on Designing for Manufacture
Solder Masks
Communicating with your Manufacturer
Manufacturing Requirements
Above Board Fall '92
SMT Advantages
Reduced weight, greater density, smaller sizes - Physical dimensions can be reduced by as much as 30 to 70 % and weight by as much as 90 %. Reduction in the number of plated through holes. Not all, but most plated through holes can be eliminated.
Smaller space required for manufacturing and component storage. - A surface mount operation can require only 10 % of the manufacturing space required by conventional through hole components.
Automated assembly and increased speed. - Integrating with automated assembly, manual stuffing and soldering can all but be eliminated as pick and place machines can now exceed 60,000 parts per hour.
- Consistent quality -This is defined as the greatest and most important attribute of SMT components.
Increased solder joint reliability - as the solder is reflowed there is greater control over temperature changes.
Improved performance and ruggedness - Due to the smaller package sizes, noise is reduced while frequency responses are improved. Also due to the smaller size, SMT components are less affected by vibration and mechanical shock.
SMT Disadvantages
The need for Additional Vias - Taking out the natural flow-through pathways previously provided by leaded components requires that more vias be incorporated into the boards' design.
Requires more exacting Pad Geometries and Footprint Designs - Here, due to the size of the components, pads and footprints must be carefully calculated in advance as sloppy placement of SMT components can cause soldering, inspection and testing problems.
Less Standardization of component size and shape - As with any new development, standardization of sizes and shapes has yet to be established between North American, European and Asian manufacturers.
Increased Thermal Problems - SMT devices due generate heat and with higher density ratios and smaller spaces requires that some consideration be given to dissipating heat buildup.
Increased Routing Layers - Where there are more connections in smaller spaces the problem of routing increases.
Above Board - Winter '92
Perhaps the most important aspect of SMT design work, and often the most overlooked one, is designing for manufacturability. For leaded components, design requirements are often not very critical. With SMT however, assembly and soldering processes should be determined before even beginning. Will it be wave soldered, reflowed(vapour phase or infrared), or both? These choices affect the design parameters that you must use.
Manufacturability of a printed circuit design is being able to consistently reproduce the board using currently available equipment and processes, with a minimum number of flaws or rejects. This is a two-stage process:
First, you must have a design which must meet the above criteria; the board must be able to reproduced from the phototools consistently and without excessive rejects.
Second, the board must be assembled and soldered with automated equipment. Manually assembling a SMT board is adequate for prototypes only.( although many will disagree to this).
Component pad geometries are also important considerations. Tolerances which are critical in the production of the circuit board ( ie the etching process) must be considered in the design layout stage. Pad geometries must be carefully calculated to suit the manufacturing and soldering techniques to be used. A circuit board designed for one soldering method does not lend itself to successful soldering by an alternate method. Some components are suitable for both wave and reflow soldering, while others are suitable for reflow only.
In wave soldering, a large quantity of solder is used to deliver the solder to the component contacts How much solder remaining on the contact area of the component depends primarily on the pad geometry. Little can be done to correct for inadequate soldering. Three of the most common defects are:
(1) solder bridges between component pads that are too close to each other
(2) non-wetting by the solder wave due to incorrect pad geometry, usually because the pads are too small
(3) the accumulation of excessive solder on the component pads, generally because the pads are too large.
With reflow soldering, solder, in the form of a solder paste, is applied to the component pads and the non-wetting problem is almost completely eliminated. However, one can now have less than sufficient solder paste to provide a reliable solder joint due to undersized pads. If the pads are too large, the component may "float" right off the pads, or rotate into an undesirable position, possibly interfering with adjacent components.
Another common problem in the reflow soldering process is "tombstoning". Small components such as resistors or capacitors can stand up on one end during the soldering process, much like tombstones. This can result in a substantial amount of rework, and generally is a designing problem caused by unsymmetrical pad geometries. If you find that most of your small chip components have "tombstoned" during the soldering process, the amount of rework may be such that it is simply not economically feasible to carry on with the current design.
It is necessary to decide early in the design stage what track widths and spaces are permissible. Gone are the familiar one (or two) tracks between IC pins. For someone not familiar with SMDs (Surface Mounted Devices), there is a tendency to go to very fine tracks because they appear to be "in proportion" to the parts. While it is easy, to zoom in a little closer and lay down 2 mil tracks on 4 mil centers, don't forget about actually having to manufacture your boards.
If your design requirements include fine lines, consult with your board manufacturer before you
actually implement them in your design. A more practical approach may be to use a multi-layer
design as opposed to very fine lines. This is a more practical approach from both the
manufacturing and engineering points of view. Very fine lines in a design mean higher signal
path impedance, and more EMI (electro-magnetic interference).Engineers go to great lengths to
avoid, or at least minimize EMI. You must be aware that there is more involved than simply
squeezing more lines into a given space. Also, normal etching techniques generally require 0.3
mm (.012") lines and 0.3 mm spaces. Fine line etching techniques require 0.2 mm (0.008") lines
with 0.2 mm spaces.
Above Board Spring '93
In previous discussions in ABOVE BOARD, the concept of designing for manufacturability was mentioned. The process of making a circuit board actually starts with the camera-ready artwork or gerber files. This process doesn't really end until you have an assembled and tested board ready to install in a piece of electronic equipment. Thus the term "manufacturability" applies to a number of different phases that the circuit board goes through, each having its own unique requirements which must be constantly considered.
The first and most obvious stage is the manufacturing of the bare board itself. Some of the parameters of concern to the designer at this phase are:
- Correct Conductor Spacings: The line-to-line, line- to-pad, and pad-to-pad spacings must be in keeping with current manufacturing technology. Etching technology has improved tremendously over the last 20 years, and the trend is definitely towards finer lines and spaces. There is, however, a limit to how fine you can go with conventional manufacturing techniques, and as a PCB designer, one has to be aware of the relationship between cost and line width. The finer the line, the more it will cost.
- Correct Hole Sizes: As with line width and spacing, the current trend is towards smaller and smaller pads, particularly vias, and hence smaller holes. Again, the designer must be aware of what the smallest via hole your board manufacturer can drill consistently. It pays to have periodic discussions with people directly involved in the manufacturing process.
- Annular Ring: As the density of components on the PCB increases, the tendency is to use smaller pads for leaded components. While in many cases this may be advisable, there is a minimum annular ring that is required for soldering the components (.005"). The designer must know what soldering process will be used and what these minimum requirements are. Also, it's a good idea to periodically review the meaning of "nominal" and "minimum". In many instances, "minimum" requirements have become the norm.
Another phase of designing for manufacturability is the testability of the bare circuit board. With complex designs, it is quite common to test the bare board for open traces, shorts, etc. prior to component population. This is the most economical scenario as anyone who has attempted to search out a fault after assembly can tell you. On a conventional through hole board, every component pin is accessible from the bottom side of the board.
If the components are placed in some systematic order, generally there are no extra steps required to ensure testability, excepting, of course, those situations where unique testing requirements are needed.
However, when using surface-mounted devices (SMDs), it is necessary to provide separate test points for each node, usually brought to the bottom side (solder side) of the circuit board. Test points can be special pads used exclusively for testing, or they can be vias placed to facilitate testing. It is highly recommended that test points be placed on a uniform grid.
Yet another aspect of manufacturability is the assembly process. Because of the high cost of labour, in order to stay competitively priced, more and more companies producing electronic equipment are utilizing automated assembly. This is particularly important in the case of surface mounted devices. Whether using conventional leaded components or SMDs, or a mixture of both, the designer must be aware of what the assembly requirements and capabilities are. Even in the early stages of PCB design, such as component placement, the designer is called upon to make certain choices regarding component locations on the board. Hopefully, these choices are based on a good understanding of the entire manufacturing process, since choices made at this stage can mean dollars saved or wasted during assembly, soldering and functional testing.
After assembly comes soldering. This is perhaps the most troublesome phase of PCB manufacturing, since it is at this stage that many design oversights/shortcuts manifest themselves. Again, this is particularly applicable in the case of surface-mounted designs. Incorrect pad geometries and/or component spacings are the most frequent problems. Having vias too close to an SMD pad can cause a lot of problems. Putting a via directly on an SMD pad can cause problems in the field.
Having components on both sides of the board is quite common in surface mounted technology, but having active components on the solder side can be extremely troublesome.
The final stage of manufacturing a printed circuit board is the functional testing. The use of automated testing for production volumes is now quite commonplace.
There are two basic methods of automated testing:
- Test Connector: All test signals are brought out to a connector where a test cable can connect the module to be tested to a computer-controlled test fixture. For the PCB designer, the connector is simply another component on and is treated as an integral part of the design.
- Bed of Nails Tester: This type of tester requires special test points on the solder side of the PCB - a design feature that must be incorporated into the layout from the beginning. The spacing of the test points is directly related to the cost of the test fixture. When using SMDs and a bed-of-nails tester, test pins must never be applied directly to the surface-mounted devices for several reasons:
- SMD pins do not always land on a grid point
- Defective solder joints may appear acceptable due to the fixture's pressing force
- Small ceramic components can be easily damaged by the test pins.
The manufacturability of a printed circuit assembly is clearly a design-related issue. In order to
ensure a smooth and trouble-free manufacturing process, the PCB designer must strive to keep
up with changes in all phases of manufacturing. A good understanding of the various processes
involved will go a long way to ensure a clean, professional and cost-effective design.
Above Board Winter '94
A solder mask is a coat of epoxy resin covering all areas of a circuit board except for areas where leads will be soldered or where there are edge connectors.
The solder mask serves a number of purposes:
(1) Eliminating solder bridging during wave soldering
(2) Reducing the amount of solder used by limiting solder deposits to only the necessary areas
(3) Reducing operating failures due to contamination of the board surface, although it is not intended to replace conformal coating.
Masks are generally applied to both sides of the board. The same mask can be applied to both top and bottom sides of a through-hole circuit board. For conventional through-hole components, solder masks are generally the wet screened type. They are applied to the board using a screening technique. As a rule of thumb, solder mask openings should be at least 0.010" larger than the land dimensions (i.e. if the land area is circular with a diameter of 0.060", then the corresponding solder mask opening should be 0.070" in diameter). This provides a 0.005" clearance between the edge of the land and the solder mask, allowing for reasonable manufacturing tolerances during the screening process.
In surface-mounted technology, solder masks are a MUST and are generally different for the top and bottom sides. The land-to-mask clearance is generally less than 0.0025" (i.e. a 0.060" round land would have a 0.065" solder mask opening). The densities and reduced line-to-line and line-to-pin spacings on SMD boards require a much tighter process control during the solder mask application.
Generally, wet screened solder masks can be used on boards with spaces and traces of .008". With dimensions of less than this, the accuracy of the screening process becomes a limiting factor, and boards using this type of solder mask generally experience more problems during the soldering process. High density SMD designs and fine line designs require a "dry film" or "photoimagable" solder mask. Both of these solder masks offer increased accuracy and are well suited for surface-mounted designs for circuit boards with spaces and traces as small as .005 or .006". LPISM ( liquid photo imageable solder masks) offers the advantage of smaller expansion requirements on the solder mask layer. This advantage is only minimal, however. A comparison of Taiyo's S222 solder mask and LPISM indicates that the advantage of going with LPISM is in the range of only .001" overall.
No discussion of solder masks and surface-mounted designs would be complete without mentioning "solder mask over bare copper" or SMOBC as it is often called. Unlike the conventional process where the board gets a tin/lead plating on all copper surfaces before the solder mask is applied, in the SMOBC process, tin/lead plating is restricted to pads only. The plating is generally followed by hot air or hot oil levelling.
The primary reason for using SMOBC is to avoid the problem of conventional tin/lead plating reflowing under and wrinkling the solder mask during the soldering process. This can lead to poor solder joints and possibly even the lifting of SMT components from their lands.
No other area in circuit board manufacturing offers more types of materials and application
methods than the area of solder masks. To date a panacea has yet to be found and to a large
extent the functionality of any method or material depends upon plating height.
Above Board Spring '95
In any business, it is important to keep up with the technological changes if one is to suceed. The printed circuit board industry is no exception, either from the manufacturing or the design perspective.
Recently, I was designing a relatively dense board using both surface mounted and leaded components. The board had several quad flat packs on it, and just to make the design a little more difficult, the pin pitch was 0.5mm (.020"). This of course meant that vias had to be placed both inside and outside the pin pattern. Since the luxury of space seems to be a thing of the past, the vias had to be placed very close to the pins just to make everything fit. Whenever the vias are in close proximity to the pins, there is always a danger of the solder rising up the via hole, mushrooming out and shorting to an adjacent pin. My obvious solution to this problem was to cover the vias with solder mask, a process called tenting. What I failed to remember, however, was that while this technique was quite common when using dry-film solder mask, it does not work when using a photoimagable solder mask. This type of solder mask only covers the via pad, it does not cover or "tent" the hole. Since dry film solder masks are becoming a thing of the past, this seemed, at first glance to be a major problem.
There are several solutions to the problem, however, and this is where a little knowledge about the manufacturing process pays off. Lacking that knowledge, it would be prudent to establish a good communication relationship with the board manufacturer.
Solution number one is to make the via holes very small (about 0.010" - 0.015"). This tends to
prevent the solder from rising up the via holes. The problem with this solution is that drilling
holes that small in a standard .062" thick board is very difficult - lots of broken bits. These
broken bits raise the cost of the board as they take time to locate and correct.
Solution number two is a better one, and requires that the board designer identify the holes that need to be tented, and clearly communicate this information to the board vendor prior to manufacture. A manufacturer can then use a process whereby the via holes in question are plugged to achieve the desired result. Again, it is important to check with the board manufacturer to ensure that all necessary photo-tools are included with the job. This technique works well if only a selected few vias need to be tented.
Solution number three is a rather ingenious one and works really well if all the vias are to be treated the same way. Again, this involves communication with the board manufacturer prior to manufacturing the boards. The process involves a few extra steps in the manufacturing cycle, and essentially amounts to plating the inside of the holes with copper only, not the usual tin-lead plating that is on the component lands. The copper plating inside the holes is not the bright and shiny copper that solder likes to stick to, but rather a somewhat more dull looking copper. Solder does not wet this type of copper very readily, and the end result is that the solder not rise up the via hole.
Problem solved! I'm certainly glad the folks at Omni Graphics pointed out this problem to me. I
was quite happy in specifying dry-film solder mask, not realizing that it has gone the way of the
carrier pidgeon. Once again it goes to show you the importance of communication and keeping
up with the changing technology.
Above Board Fall '95
Getting product to market as soon as possible means "getting it right the first time." To do this requires a sound technical knowledge of the board manufacturing process, as well as effective communications between the designer and the board manufacturer. Few, if any, vendors are clairvoyants first and board manufacturers second. It is up to the designer to communicate exact requirements for board designs.
Understandably, the first thing that the vendor looks for are the data files for each layer. Artwork for each layer is now generally supplied in `Gerber' format, a variation of the NC drill language. Essential to thesefiles are the aperture files which define each line size and pad shape in the Gerber data. A good idea is to have a standard aperture list for all board designs on file with your board vendor, and to modify this list as little as possible. Due to the unstructured nature of the aperture file, it is difficult to automate the transfer of this information from the various CAD layout programs to the vendor's photoplotter. The less you change the aperture file, the less chance of errors in photoplotting. Once your aperture file is in your vendor's system and the photoplots have been checked and found to be correct, the possibility of errors in future work is reduced considerably.
Using the free gerber viewing program GCPrevue can eliminate many opportunities to enter errors into your aperture files. With this program your images, aperture and drill files can be saved into a working file ( with a file extension of .PWK - a Prevue WorK file). This one file be sent to the board shop. Conversion utilites are available to convert aperture files from many CAD programs without having to manually re enter all of the values.
Checkplots of individual layers can also be sent along. Keep in mind that vendors uses checkplots as checks - not as fabrication drawings. If you intend your checkplot to be a fabrication drawing either identify it as such or clearly state your intention to the board shop.
The next item of information that the board vendor needs is the fabrication drawing, which contains the board outline, showing any cutouts and notches. The drawing should show each feature dimensioned; i.e. length, width, and cutouts or notches. There should be one datum point on the drawing from which all dimensions are referenced. This datum point should be the center point of a tooling hole or mounting hole, preferably near the lower left-hand corner of the board. Do not use the board edge or corner as the datum, as this can lead to inaccuracies as the manufacturing tolerances build up.
Traditionally, part of the fabrication drawing is the drill legend and the drill data. It is now common to see drill files on disk accompanied by a text file listing out the drill codes and the matching hole sizes. The drill legend is the graphical representation of the drill holes on the fabrication drawing. A common practice is to assign a unique symbol for each hole size used on the board, and to plot these symbols on the fabrication drawing, along with a chart or legend that references each symbol to a specific hole diameter. Hole diameters specified on the fabrication drawing are considered to be finished hole diameters, ie after through hole plating.
The drill data is the actual X and Y co-ordinates of all the holes on the board, sorted by diameters, and generally in NC format, or a variation thereof.
The final block of information should specify board thickness and tolerance, board material, copper thickness, plating requirements, solder mask (resist) and silkscreening (component identification) requirements.
When specifying board thickness, indicate to the vendor whether the thickness is to be measured over base laminate, plated features, or solder mask coating. If there is no need for stringent tolerancing on the board thickness, specify base laminate as the feature to be measured. This gives the vendor a little more freedom in the manufacturing process, and ultimately it saves you money.
Solder mask requirements can vary from design to design, and is a topic in itself. A detailed discussion of solder masks appeared in a past issue of the Omni Review. Similarly plating requirements can vary considerably. While tin/lead plating is still perhaps the most common, it can be applied over all copper on the board, or it can be plated selectively on pads only, such as in SMOBC ( solder mask on bare copper ).
It is always a good practice to consult with your board vendor when unsure about board
specifications. After all, they are experts in their field and effective communication is the key.